Here is an example of a three bit multiplication in Verilog made to fit into a EPM7160SLC84-10.
I think I wrote a four bit one that I will try to find.
/*****************************
Description of Multiplier:
Three bit multiplication with
macrocell count.
------------------------------
Date: 2.28.2006
Version: 1.0
*****************************/
module multiplier( valA, valB, result );
/*****************************
Inputs:
*****************************/
input [2:0] valA;
input [2:0] valB;
/*****************************
Outputs:
*****************************/
output [7:0] A;
/*****************************
Wires:
*****************************/
wire [5:0] mp0, mp1, mp2;
assign mp0 = (valB[0]) ? { 2'b00, valA } : 5'b00000;
assign mp1 = (valB[1]) ? { 1'b0, valA, 1'b0 } : 5'b00000;
assign mp2 = (valB[2]) ? { valA, 2'b00 } : 5'b00000;
assign result = mp0 + mp1 + mp2;
endmodule |
/*****************************
Description of Multiplier:
Three bit multiplication with
macrocell count.
------------------------------
Date: 2.28.2006
Version: 1.0
*****************************/
module multiplier( valA, valB, result );
/*****************************
Inputs:
*****************************/
input [2:0] valA;
input [2:0] valB;
/*****************************
Outputs:
*****************************/
output [7:0] A;
/*****************************
Wires:
*****************************/
wire [5:0] mp0, mp1, mp2;
assign mp0 = (valB[0]) ? { 2'b00, valA } : 5'b00000;
assign mp1 = (valB[1]) ? { 1'b0, valA, 1'b0 } : 5'b00000;
assign mp2 = (valB[2]) ? { valA, 2'b00 } : 5'b00000;
assign result = mp0 + mp1 + mp2;
endmodule
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on Sunday, June 21st, 2009 at 3:20 pm and is filed under Verilog.
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